Wireless devices have been in use for many years for enabling mobile communication of voice and data. Such devices can include mobile phones and wireless enabled personal digital assistants (PDA's) for example. FIG. 1 is a generic block diagram of the core components of such wireless devices. The wireless core 10 includes a baseband processor 12 for controlling application specific functions of the wireless device and for providing and receiving voice or data signals to a radio frequency (RF) transceiver chip 14. The RF transceiver chip 14 is responsible for frequency up-conversion of transmission signals, and frequency down-conversion of received signals. RF transceiver chip 14 includes a receiver core 16 connected to an antenna 18 for receiving transmitted signals from a base station or another mobile device, and a transmitter core 20 for transmitting signals through the antenna 18 via a gain circuit 22. Those of skill in the art should understand that FIG. 1 is a simplified block diagram, and can include other functional blocks that may be necessary to enable proper operation or functionality.
An important function of wireless core 10 is to control transmission signal gain in response to base station requests. Typically, the base station in communication with the wireless device will instruct the wireless device to increase the gain for transmission, since the previously transmitted signals may have been detected as being sub-optimal. Those of skill in the art will understand that the request from the base station is embedded within the communication signal being transmitted to the wireless device. This increase can be specified as being a 10 dB increase, for example. Alternately, the base station can instruct the wireless device to reduce gain, in order to conserve battery power of the wireless device while maintaining optimal performance. To adjust the gain provided by gain circuit 22, baseband processor 12 will generate an analog input control voltage signal VCONT for controlling gain circuit 22 to provide the desired gain.
In fact, the relationship between the desired gain and the voltage level of VCONT should be linear, and many standards presently in use specify a close to linear relationship between VCONT and gain. Such standards include EDGE and WCDMA communications standards for example, and failure to adhere to this particular aspect of such standards can result in non-certification of the wireless core for sale or use in standard-compliant wireless devices.
Most radio frequency (RF) devices, which typically include gain circuits, are manufactured using SiGe, GaAs, or other heterojunction technologies. Those of skill in the art will understand the advantages provided by SiGe and GaAs devices. GaAs devices have higher electron mobility, run on low power, and generate less noise than traditional CMOS devices, while SiGe heterojunction devices have good forward gain and low reverse gain characteristics, which translate into low current and high frequency performance than typically available from homojunction or traditional bipolar transistors. Gain circuits fabricated with such technologies generally exhibit a substantially linear relationship between gain and VCONT. However, such manufacturing technologies are relatively new, very complex, and hence expensive. Consequently, the costs for manufacturing these RF devices can be prohibitive. Complementary Metal Oxide Semiconductor (CMOS) technology on the other hand, is a very mature and inexpensive fabrication process for the production of semiconductor devices.
Unfortunately, CMOS gain circuits do not exhibit a substantially linear characteristic between gain and the input control voltage VCONT. A plot of VCONT (in volts V) versus gain (in dB) is shown in FIG. 2 to illustrate the non-linear characteristics of a standard gain circuit manufactured with CMOS technology. As shown in FIG. 2, the actual gain per VCONT increment is not consistent across the VCONT range, and the gain will change in a non-linear fashion with respect to a change in VCONT, as shown by curves 30 and 32. By example, a desired linear relationship between VCONT and gain is shown by curve 34.
Further compounding this non-linearity are variants, such as supply voltage variations, operating temperature variations, and process variations. These variations can cause a shift in the curves shown in FIG. 2, and/or exacerbate the existing non-linear response of the circuit. Those of skill in the art will appreciate that any one of these variants can affect the operating characteristics of transistor devices, and ultimately, the gain characteristics of the circuit. Supply voltage variations refers to a change in the power supply, operating temperature variations refers to the temperature experienced by the circuit due to environment, and process variation refers manufacturing anomalies that result in the transistor threshold voltages other than that which was designed for.
This non-linearity due to the inherent properties of CMOS and the previously described variants can be corrected, or compensated, within the gain circuit through feedback mechanisms or use of reference circuits.
FIG. 3 is a block diagram of gain circuit 22 shown in FIG. 1, with a feedback mechanism for non-linearity compensation. Gain circuit 22 includes a variable amplifier circuit 40 for receiving a transmit input signal TX_IN generated by transmitter core 20, and for generating transmit output signal TX_OUT. The gain of TX_OUT is determined by the signal VGAIN. An automatic gain circuit (AGC) 42 generates VGAIN in response to input control voltage VCONT and the fed-back TX_OUT signal. In principle, AGC 42 compares the fed-back level of TX_OUT to VCONT, and appropriately adjusts VGAIN to ensure that the desired gain of TX_OUT is obtained. Unfortunately, this technique for automatic adjustment of the gain is not suitable due to loading of the TX_OUT node by the feed back loop line to AGC 42. This loading can cause distortion and loss of output signal strength, and is hence, undesirable. This loading may also introduce noise in the TX signal which is also undesirable.
FIG. 4 is a block diagram of gain circuit 22 shown in FIG. 1, with a reference replica circuit, also known as a dummy circuit, for non-linearity compensation. Gain circuit 22 includes a variable amplifier circuit 40 for receiving a transmit input signal TX_IN generated by transmitter core 20, and for generating transmit output signal TX_OUT. As with the circuit of FIG. 3, the gain of TX_OUT is determined by signal VGAIN. An AGC 44 generates VGAIN in response to input control voltage VCONT and compensation signal COMP. Signal COMP is generated by replica circuit 46, which is used by AGC 44 to adjust VGAIN. The replica circuit 46 can include identically configured elements of variable amplifier circuit 40, which functions as a reference circuit used to track electrical variations of the variable amplifier circuit 40. However, this technique is not effective for adjusting VGAIN properly in response to supply voltage, process and temperature variations. More specifically, the range of adjustment is limited by virtue of the fact that the replica circuit may not be capable of detecting supply voltage, temperature and process variations due to the analog nature of the dummy circuit, which lacks reproducibility and controllability.
It is, therefore, desirable to provide an automatic gain control circuit that can accurately and effectively maintain a substantially linear relationship between gain and the input control voltage while compensating for supply voltage, temperature and process variations, in CMOS fabricated gain circuits.